Solder mask clearance you'll measure once

Why clearance isn't optional

Solder mask sits on top of copper traces to protect them and prevent bridges during assembly. The clearance—the gap you leave between the edge of a pad and where the mask starts—determines whether solder flows where you want it or creeps across your board like it owns the place.

Most fab houses default to 100 µm (about 4 mils) of expansion beyond your pad geometry. That means if you draw a 1.5 mm pad, the mask opening will be roughly 1.7 mm. For through-hole and large SMD parts, that's fine. For 0402 passives or fine-pitch ICs, it's a bridge waiting to happen.

You set this once in your design rules. Then you forget about it until a board comes back and two QFN pads share a solder bead.

Recommended clearances by pitch

For 0.5 mm pitch and coarser (SOIC, most QFPs), stick with the fab default: 100 µm expansion works. The pads are large enough that a little extra exposed copper won't cause problems, and you want enough room for solder to wick slightly without jumping gaps.

For 0.4 mm pitch (many QFNs, fine-pitch connectors), tighten to 50 µm. You're already fighting pad-to-pad spacing; giving solder more room to wander is a mistake you'll pay for in inspection time.

For anything finer—0.3 mm pitch or denser—consider solder-mask-defined pads where the mask opening is smaller than the copper pad beneath. The mask becomes a stencil aperture. This requires tight fab tolerances, but it's the only reliable way to avoid bridges on high-density boards.

Through-hole can stay at 100 µm or even wider if you're hand-soldering. The annular ring gives you margin, and a little extra mask clearance makes it easier to see what you're heating.

Design rule setup

In KiCad, this lives under Board Setup → Design Rules → Solder Mask/Paste. Set your "Solder mask expansion" to your chosen value (positive expands the opening; negative shrinks it for mask-defined pads). Set "Minimum solder mask width" to at least 100 µm so you don't end up with mask slivers that peel during reflow.

In Altium, it's Design → Rules → Mask → Solder Mask Expansion. Create separate rules for fine-pitch footprints if you're mixing pitches on one board—query by component class or net class and assign tighter clearances where needed.

Run DRC before sending Gerbers. Most fabs will flag clearance violations during their pre-flight check, but finding out after you've paid for the board is a poor way to learn.

When to override per-footprint

Sometimes a specific part needs non-standard treatment. RF shield cans, high-current terminals, or parts with unusual thermal requirements may call for custom mask openings.

Override at the footprint level, not by manually editing the mask layer. If you draw polygons on the mask layer by hand, you've just created a maintenance problem that will bite you on rev B when you forget what you did and why.

Document the override in the footprint description or the schematic symbol's datasheet field. Future you will appreciate the note when the board comes back and one component looks different from the rest.

Inspection tells you if you got it right

When bare boards arrive, check a fine-pitch IC under a loupe or microscope. You should see clean mask edges with no ragged slivers between pads. If the mask looks like it's bleeding into the gap, your clearance was too tight for your fab's process. If pads look like they're swimming in open copper, you went too loose and you'll fight bridges during assembly.

Adjust once, then lock it into your template. This isn't a parameter you revisit every board unless you're changing pitch or moving to a new fab.

For more on surviving the assembly process with margins that matter, see Decoupling caps where the datasheet actually wants them—another place where spec compliance prevents late nights.